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Backport subject : PMU improvements and Perf sampling in KVM guest#218

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zhuzhenxxx-collab wants to merge 29 commits intoRVCK-Project:rvck-6.6from
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Backport subject : PMU improvements and Perf sampling in KVM guest#218
zhuzhenxxx-collab wants to merge 29 commits intoRVCK-Project:rvck-6.6from
zhuzhenxxx-collab:feat/guest_pmu

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@zhuzhenxxx-collab zhuzhenxxx-collab commented Feb 9, 2026 •
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patch合入情况：

### 依赖patch：
https://lore.kernel.org/all/cover.1705916069.git.haibo1.xu@intel.com/
[PATCH v5 01/12] selftests/kvm: Fix issues with $(SPLIT_TESTS)  本次合入
[PATCH v5 02/12] KVM: arm64: selftests: Data type cleanup for arch_timer test 未合入
[PATCH v5 03/12] KVM: arm64: selftests: Enable tuning of error margin in " 未合入
[PATCH v5 04/12] KVM: arm64: selftests: Split arch_timer test code 本次合入
[PATCH v5 05/12] KVM: selftests: Add CONFIG_64BIT definition for the build 未合入
[PATCH v5 06/12] tools: riscv: Add header file csr.h 未合入
[PATCH v5 07/12] tools: riscv: Add header file vdso/processor.h 未合入
[PATCH v5 08/12] KVM: riscv: selftests: Switch to use macro from csr.h 未合入
[PATCH v5 09/12] KVM: riscv: selftests: Add exception handling support 本次合入
[PATCH v5 10/12] KVM: riscv: selftests: Add guest helper to get vcpu id 本次合入
[PATCH v5 11/12] KVM: riscv: selftests: Change vcpu_has_ext to a common function 本次合入
[PATCH v5 12/12] KVM: riscv: selftests: Add sstc timer test 本次合入

### 主要功能patch：
https://lore.kernel.org/all/20240420151741.962500-2-atishp@rivosinc.com/ 
[PATCH v8 01/24] RISC-V: Fix the typo in Scountovf CSR name 本次合入
[PATCH v8 02/24] RISC-V: Add FIRMWARE_READ_HI definition 本次合入
[PATCH v8 03/24] drivers/perf: riscv: Read upper bits of a firmware counter 本次合入
[PATCH v8 04/24] drivers/perf: riscv: Use BIT macro for shifting operations 本次合入
[PATCH v8 05/24] RISC-V: Add SBI PMU snapshot definitions 本次合入
[PATCH v8 06/24] RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name 本次合入
[PATCH v8 07/24] RISC-V: Use the minor version mask while computing sbi version 本次合入
[PATCH v8 08/24] drivers/perf: riscv: Fix counter mask iteration for RV32 本次合入
[PATCH v8 09/24] drivers/perf: riscv: Implement SBI PMU snapshot function 本次合入
[PATCH v8 10/24] RISC-V: KVM: Fix the initial sample period value    (rvck已合入）
[PATCH v8 11/24] RISC-V: KVM: No need to update the counter value during reset 本次合入
[PATCH v8 12/24] RISC-V: KVM: No need to exit to the user space if perf event failed 本次合入
[PATCH v8 13/24] RISC-V: KVM: Implement SBI PMU Snapshot feature 本次合入
[PATCH v8 14/24] RISC-V: KVM: Add perf sampling support for guests 本次合入 
[PATCH v8 15/24] RISC-V: KVM: Support 64 bit firmware counters on RV32 本次合入
[PATCH v8 16/24] RISC-V: KVM: Improve firmware counter read function 本次合入
[PATCH v8 17/24] KVM: riscv: selftests: Move sbi definitions to its own header file 本次合入
[PATCH v8 18/24] KVM: riscv: selftests: Add helper functions for extension checks 本次合入
[PATCH v8 19/24] KVM: riscv: selftests: Add Sscofpmf to get-reg-list test 本次合入
[PATCH v8 20/24] KVM: riscv: selftests: Add SBI PMU extension definitions 本次合入
[PATCH v8 21/24] KVM: riscv: selftests: Add SBI PMU selftest 本次合入
[PATCH v8 22/24] KVM: riscv: selftests: Add a test for PMU snapshot functionality 本次合入
[PATCH v8 23/24] KVM: riscv: selftests: Add a test for counter overflow 本次合入
[PATCH v8 24/24] KVM: riscv: selftests: Add commandline option for SBI PMU test 本次合入

启动host

qemu-system-riscv64 -nographic -cpu rv64,sscofpmf=true,zicond=true,zcb=true,v=true,zvkned=true,zvkg=true,zvkb=true -smp 8 -M virt,pflash0=pflash0,pflash1=pflash1,aia=aplic-imsic,acpi=on,aia-guests=2 -m 4G -serial mon:stdio -blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd -blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd -kernel /home/o_zhuzx/rvck/arch/riscv/boot/Image -initrd ./unaligned_cpio/rootfs.new.cpio -append "rdinit=/sbin/init ro console=ttyS0 rootwait earlycon=uart8250"
测试sbi selftest
./sbi_pmu_test 
SBI PMU basic test : PASS
[  672.564941] riscv-kvm-pmu: kvm pmu event creation failed for eidx 1234: -22
SBI PMU event verification test : PASS
SBI PMU event verification with snapshot test : PASS
SBI PMU event verification with overflow test : PASS
# eidx 1234	一个故意传入的无效事件 ID
启动guest
./lkvm run -m 256 -c2 --console serial -p "console=ttyS0 earlycon" --disable-ssaia -k ./Image --debug  --9p /mnt/share,tag=hostshare  --transport mmio
将perf 拷贝到guest
mkdir -p /mnt/share
mount -t 9p "tag=hostshare" /mnt/share -o trans=virtio,version=9p2000.L
先设置低采样率， 防止性能不足host崩溃
echo 100 > /proc/sys/kernel/perf_event_max_sample_rate

>   /mnt/share/perf bench sched messaging -g 5
[  368.068543] perf: interrupt took too long (7325 > 2500), lowering kernel.perf_event_max_sample_rate to 27250
# Running 'sched/messaging' benchmark:
[  368.307203] perf: interrupt took too long (9711 > 9156), lowering kernel.perf_event_max_sample_rate to 20500
[  368.587469] perf: interrupt took too long (12612 > 12138), lowering kernel.perf_event_max_sample_rate to 15750
[  369.082141] perf: interrupt took too long (15911 > 15765), lowering kernel.perf_event_max_sample_rate to 12500
[  369.656568] perf: interrupt took too long (20214 > 19888), lowering kernel.perf_event_max_sample_rate to 9750
[  370.353348] perf: interrupt took too long (25797 > 25267), lowering kernel.perf_event_max_sample_rate to 7750
[  372.899109] perf: interrupt took too long (32535 > 32246), lowering kernel.perf_event_max_sample_rate to 6000
[  376.483151] perf: interrupt took too long (40717 > 40668), lowering kernel.perf_event_max_sample_rate to 4750
[  379.875644] perf: interrupt took too long (51108 > 50896), lowering kernel.perf_event_max_sample_rate to 3750
# 20 sender and receiver processes per group
# 5 groups == 200 processes run

     Total time: 11.397 [sec]
[ perf record: Woken up 1 times to write data ]

[ perf record: Captured and wrote 0.056 MB perf.data (312 samples) ]

#
report
/mnt/share/perf report --stdio
# To display the perf.data header info, please use --header/--header-only option
#
#
# Total Lost Samples: 0
#
# Samples: 312  of event 'cycles'
# Event count (approx.): 3120000000
#
# Overhead  Command          Shared Object      Symbol                          
# ........  ...............  .................  ................................
#
    16.99%  sched-messaging  [kernel.kallsyms]  [k] finish_task_switch.isra.0
     5.77%  sched-messaging  [kernel.kallsyms]  [k] _raw_spin_unlock_irqrestore
     5.13%  sched-messaging  [kernel.kallsyms]  [k] memset
     4.17%  sched-messaging  [kernel.kallsyms]  [k] handle_softirqs
     3.21%  sched-messaging  [kernel.kallsyms]  [k] __sbi_rfence_v02_call.isra.0
     2.24%  sched-messaging  [kernel.kallsyms]  [k] aa_file_perm
     2.24%  sched-messaging  [kernel.kallsyms]  [k] apparmor_file_permission
     1.92%  sched-messaging  [kernel.kallsyms]  [k] __check_object_size
     1.92%  sched-messaging  [kernel.kallsyms]  [k] set_pte_range
     1.92%  sched-messaging  [kernel.kallsyms]  [k] unix_stream_read_generic
     1.60%  sched-messaging  [kernel.kallsyms]  [k] fallback_scalar_usercopy_sum
     1.60%  sched-messaging  [kernel.kallsyms]  [k] percpu_counter_add_batch
standard input
# 5 groups == 200 processes run

     Total time: 11.397 [sec]
[ perf record: Woken up 1 times to write data ]
record
 /mnt/share/perf record -F 10 -e cycles -- sleep 1
[  252.573692] perf: interrupt took too long (6599 > 2500), lowering kernel.perf_event_max_sample_rate to 30250
[  132.496077] perf: interrupt took too long (19467 > 2500), lowering kernel.perf_event_max_sample_rate to 10250
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.001 MB perf.data (2 samples) ]
report
/mnt/share/perf report --stdio
# To display the perf.data header info, please use --header/--header-only option
#
#
# Total Lost Samples: 0
#
# Samples: 2  of event 'cycles'
# Event count (approx.): 2
#
# Overhead  Command  Shared Object      Symbol                       
# ........  .......  .................  .............................
#
    50.00%  perf-ex  [kernel.kallsyms]  [k] finish_task_switch.isra.0
    50.00%  perf-ex  [kernel.kallsyms]  [k] handle_softirqs

让 KVM 虚拟机（guest）能够高效、准确地使用性能计数器（如 perf 工具），尤其是在支持硬件采样（sampling）的场景下。
#184

atishp04 and others added 29 commits February 9, 2026 02:40
@atishp04
RISC-V: Fix the typo in Scountovf CSR name
16035a3 
mainline inclusion
from Linux 6.10-rc1
commit d1927f6
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The counter overflow CSR name is "scountovf" not "sscountovf".

Fix the csr name.

Fixes: 4905ec2 ("RISC-V: Add sscofpmf extension support")
Reviewed-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-2-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: Add FIRMWARE_READ_HI definition
fb206fc 
mainline inclusion
from Linux 6.10-rc1
commit 5d4acb7
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI v2.0 added another function to SBI PMU extension to read
the upper bits of a counter with width larger than XLEN.

Add the definition for that function.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Clément Léger <cleger@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-3-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
drivers/perf: riscv: Read upper bits of a firmware counter
162964b 
mainline inclusion
from Linux 6.10-rc1
commit 7dda24b
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI v2.0 introduced a explicit function to read the upper 32 bits
for any firmware counter width that is longer than 32bits.
This is only applicable for RV32 where firmware counter can be
64 bit.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-4-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
drivers/perf: riscv: Use BIT macro for shifting operations
1b877ce 
mainline inclusion
from Linux 6.10-rc1
commit c69f9cb
category: feature
bugzilla: RVCK-Project#184

--------------------------------

It is a good practice to use BIT() instead of (1 << x).
Replace the current usages with BIT().

Take this opportunity to replace few (1UL << x) with BIT() as well
for consistency.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-5-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: Add SBI PMU snapshot definitions
cda39c6 
mainline inclusion
from Linux 6.10-rc1
commit 8f486ce
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI PMU Snapshot function optimizes the number of traps to
higher privilege mode by leveraging a shared memory between the S/VS-mode
and the M/HS mode. Add the definitions for that extension and new error
codes.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-6-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name
c3f6044 
mainline inclusion
from Linux 6.10-rc1
commit 3ddb6d4
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI_STA_SHMEM_DISABLE is a macro to invoke disable shared memory
commands. As this can be invoked from other SBI extension context
as well, rename it to more generic name as SBI_SHMEM_DISABLE.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-7-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: Use the minor version mask while computing sbi version
c892dfa 
mainline inclusion
from Linux 6.10-rc1
commit b737fc2
category: feature
bugzilla: RVCK-Project#184

--------------------------------

As per the SBI specification, minor version is encoded in the
lower 24 bits only. Make sure that the SBI version is computed
with the appropriate mask.

Currently, there is no minor version in use. Thus, it doesn't
change anything functionality but it is good to be compliant with
the specification.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-8-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
drivers/perf: riscv: Fix counter mask iteration for RV32
fdeb1db 
mainline inclusion
from Linux 6.10-rc1
commit b994cdf
category: feature
bugzilla: RVCK-Project#184

--------------------------------

For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses
to interleave firmware/hardware counters indicies. Even though it's a
unlikely scenario, handle that case by iterating over all the words
instead of just using the first word.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-9-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
drivers/perf: riscv: Implement SBI PMU snapshot function
220e15b 
mainline inclusion
from Linux 6.10-rc1
commit a862521
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI v2.0 SBI introduced PMU snapshot feature which adds the following
features.

1. Read counter values directly from the shared memory instead of
csr read.
2. Start multiple counters with initial values with one SBI call.

These functionalities optimizes the number of traps to the higher
privilege mode. If the kernel is in VS mode while the hypervisor
deploy trap & emulate method, this would minimize all the hpmcounter
CSR read traps. If the kernel is running in S-mode, the benefits
reduced to CSR latency vs DRAM/cache latency as there is no trap
involved while accessing the hpmcounter CSRs.

In both modes, it does saves the number of ecalls while starting
multiple counter together with an initial values. This is a likely
scenario if multiple counters overflow at the same time.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-10-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: No need to update the counter value during reset
7078270 
mainline inclusion
from Linux 6.10-rc1
commit 98ce906
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The virtual counter value is updated during pmu_ctr_read. There is no need
to update it in reset case. Otherwise, it will be counted twice which is
incorrect.

Fixes: 0cb74b6 ("RISC-V: KVM: Implement perf support without sampling")
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-12-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: No need to exit to the user space if perf event failed
ec013b0 
mainline inclusion
from Linux 6.10-rc1
commit 2196c06
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Currently, we return a linux error code if creating a perf event failed
in kvm. That shouldn't be necessary as guest can continue to operate
without perf profiling or profiling with firmware counters.

Return appropriate SBI error code to indicate that PMU configuration
failed. An error message in kvm already describes the reason for failure.

Fixes: 0cb74b6 ("RISC-V: KVM: Implement perf support without sampling")
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-13-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: Implement SBI PMU Snapshot feature
4c330d8 
mainline inclusion
from Linux 6.10-rc1
commit c2f41dd
category: feature
bugzilla: RVCK-Project#184

--------------------------------

PMU Snapshot function allows to minimize the number of traps when the
guest access configures/access the hpmcounters. If the snapshot feature
is enabled, the hypervisor updates the shared memory with counter
data and state of overflown counters. The guest can just read the
shared memory instead of trap & emulate done by the hypervisor.

This patch doesn't implement the counter overflow yet.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-14-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: Add perf sampling support for guests
5954414 
mainline inclusion
from Linux 6.10-rc1
commit 16b0bde
category: feature
bugzilla: RVCK-Project#184

--------------------------------

KVM enables perf for guest via counter virtualization. However, the
sampling can not be supported as there is no mechanism to enabled
trap/emulate scountovf in ISA yet. Rely on the SBI PMU snapshot
to provide the counter overflow data via the shared memory.

In case of sampling event, the host first sets the guest's LCOFI
interrupt and injects to the guest via irq filtering mechanism defined
in AIA specification. Thus, ssaia must be enabled in the host in order
to use perf sampling in the guest. No other AIA dependency w.r.t kernel
is required.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-15-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: Support 64 bit firmware counters on RV32
98c8930 
mainline inclusion
from Linux 6.10-rc1
commit 08fb07d
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The SBI v2.0 introduced a fw_read_hi function to read 64 bit firmware
counters for RV32 based systems.

Add infrastructure to support that.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-16-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
RISC-V: KVM: Improve firmware counter read function
b38dae2 
mainline inclusion
from Linux 6.10-rc1
commit 4e21f22
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Rename the function to indicate that it is meant for firmware
counter read. While at it, add a range sanity check for it as
well.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240420151741.962500-17-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@bonzini
selftests/kvm: Fix issues with $(SPLIT_TESTS)
5751f39 
mainline inclusion
from Linux 6.9-rc1
commit 2c5af1c
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The introduction of $(SPLIT_TESTS) also introduced a warning when
building selftests on architectures that include get-reg-lists:

    make: Entering directory '/root/kvm/tools/testing/selftests/kvm'
    Makefile:272: warning: overriding recipe for target '/root/kvm/tools/testing/selftests/kvm/get-reg-list'
    Makefile:267: warning: ignoring old recipe for target '/root/kvm/tools/testing/selftests/kvm/get-reg-list'
    make: Leaving directory '/root/kvm/tools/testing/selftests/kvm'

In addition, the rule for $(SPLIT_TESTS_TARGETS) includes _all_
the $(SPLIT_TESTS_OBJS), which only works because there is just one.
So fix both by adjusting the rules:

- remove $(SPLIT_TESTS_TARGETS) from the $(TEST_GEN_PROGS) rules,
  and rename it to $(SPLIT_TEST_GEN_PROGS)

- fix $(SPLIT_TESTS_OBJS) so that it plays well with $(OUTPUT),
  rename it to $(SPLIT_TEST_GEN_OBJ), and list the object file
  explicitly in the $(SPLIT_TEST_GEN_PROGS) link rule

Fixes: 17da79e ("KVM: arm64: selftests: Split get-reg-list test code", 2023-08-09)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@xiaobo55x
KVM: arm64: selftests: Split arch_timer test code
c238590 
mainline inclusion
from Linux 6.9-rc1
commit c20dd9e
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Split the arch-neutral test code out of aarch64/arch_timer.c
and put them into a common arch_timer.c. This is a preparation
to share timer test codes in riscv.

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@xiaobo55x
KVM: riscv: selftests: Add exception handling support
b76a73a 
mainline inclusion
from Linux 6.9-rc1
commit 38f680c
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Add the infrastructure for guest exception handling in riscv selftests.
Customized handlers can be enabled by vm_install_exception_handler(vector)
or vm_install_interrupt_handler().

The code is inspired from that of x86/arm64.

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@xiaobo55x
KVM: riscv: selftests: Add guest helper to get vcpu id
722a210 
mainline inclusion
from Linux 6.9-rc1
commit 1e97928
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Add guest_get_vcpuid() helper to simplify accessing to per-cpu
private data. The sscratch CSR was used to store the vcpu id.

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@xiaobo55x
KVM: riscv: selftests: Change vcpu_has_ext to a common function
66d47d8 
mainline inclusion
from Linux 6.9-rc1
commit 812806b
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Move vcpu_has_ext to the processor.c and rename it to __vcpu_has_ext
so that other test cases can use it for vCPU extension check.

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@xiaobo55x
KVM: riscv: selftests: Add sstc timer test
856bccd 
mainline inclusion
from Linux 6.9-rc1
commit d0b94bc
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Add a KVM selftests to validate the Sstc timer functionality.
The test was ported from arm64 arch timer test.

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Move sbi definitions to its own header file
1af8273 
mainline inclusion
from Linux 6.10-rc1
commit 9408a23
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The SBI definitions will continue to grow. Move the sbi related
definitions to its own header file from processor.h

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240420151741.962500-18-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add helper functions for extension checks
38713c3 
mainline inclusion
from Linux 6.10-rc1
commit 97be675
category: feature
bugzilla: RVCK-Project#184

--------------------------------

__vcpu_has_ext can check both SBI and ISA extensions when the first
argument is properly converted to SBI/ISA extension IDs. Introduce
two helper functions to make life easier for developers so they
don't have to worry about the conversions.

Replace the current usages as well with new helpers.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240420151741.962500-19-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add Sscofpmf to get-reg-list test
5475797 
mainline inclusion
from Linux 6.10-rc1
commit 3a21b37
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The KVM RISC-V allows Sscofpmf extension for Guest/VM so let us
add this extension to get-reg-list test.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-20-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add SBI PMU extension definitions
ef495c4 
mainline inclusion
from Linux 6.10-rc1
commit 3203b94
category: feature
bugzilla: RVCK-Project#184

--------------------------------

The SBI PMU extension definition is required for upcoming SBI PMU
selftests.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-21-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add SBI PMU selftest
4d7c7d3 
mainline inclusion
from Linux 6.10-rc1
commit 158cb9e
category: feature
bugzilla: RVCK-Project#184

--------------------------------

This test implements basic sanity test and cycle/instret event
counting tests.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-22-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add a test for PMU snapshot functionality
37c4ce6 
mainline inclusion
from Linux 6.10-rc1
commit 13cb706
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Verify PMU snapshot functionality by setting up the shared memory
correctly and reading the counter values from the shared memory
instead of the CSR.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-23-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add a test for counter overflow
9dbc694 
mainline inclusion
from Linux 6.10-rc1
commit 4ace257
category: feature
bugzilla: RVCK-Project#184

--------------------------------

Add a test for verifying overflow interrupt. Currently, it relies on
overflow support on cycle/instret events. This test works for cycle/
instret events which support sampling via hpmcounters on the platform.
There are no ISA extensions to detect if a platform supports that. Thus,
this test will fail on platform with virtualization but doesn't
support overflow on these two events.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-24-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@atishp04
KVM: riscv: selftests: Add commandline option for SBI PMU test
16cc57b 
mainline inclusion
from Linux 6.10-rc1
commit 5ef2f3d
category: feature
bugzilla: RVCK-Project#184

--------------------------------

SBI PMU test comprises of multiple tests and user may want to run
only a subset depending on the platform. The most common case would
be to run all to validate all the tests. However, some platform may
not support all events or all ISA extensions.

The commandline option allows user to disable any set of tests if
they want to.

Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240420151741.962500-25-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
@github-actions
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github-actions bot commented Feb 9, 2026 •
edited
Loading

开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/21811438599

参数解析结果
args value
repository RVCK-Project/rvck
head ref pull/218/head
base ref rvck-6.6
LAVA repo RVCK-Project/lavaci
LAVA Template lava-job-template/qemu/qemu-ltp.yaml
Testcase path lava-testcases/common-test/ltp/ltp.yaml
need run job kunit-test,kernel-build,check-patch,lava-trigger

测试完成

详细结果:

RVCK result

check result
kunit-test success
kernel-build success
lava-trigger success
check-patch success

Kunit Test Result

[03:39:40] Testing complete. Ran 457 tests: passed: 445, skipped: 12

Kernel Build Result

Kernel build succeeded: RVCK-Project/rvck/218/

ef4b0a2b488b3fe80c296abb623b20c6 /srv/guix_result/16cc57bf99f215df1c93116cb17c01edeb3cccc3/Image
4736e3403e4120a202590b8f84ccb708 /root/initramfs.img

LAVA Check

args:

result:

Lava check done! lava log: https://lava.oerv.ac.cn/scheduler/job/1412

lava result count: [fail]: 173, [pass]: 1436, [skip]: 290

Check Patch Result
Total Errors 0
Total Warnings 33

@fangyu0809
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fangyu0809 commented Feb 10, 2026

@zhuzhenxxx-collab 在虚拟机里运行perf record的自测试结果，也更新到上面的自测试里面

@zhuzhenxxx-collab
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zhuzhenxxx-collab commented Feb 11, 2026

@zhuzhenxxx-collab 在虚拟机里运行perf record的自测试结果，也更新到上面的自测试里面

Updated

@fangyu0809
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fangyu0809 commented Feb 11, 2026

@sterling-teng 自测已完成，帮忙Review合并。

@sterling-teng
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sterling-teng commented Feb 12, 2026

@sterling-teng 自测已完成，帮忙Review合并。

好的。

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6 participants

@zhuzhenxxx-collab @fangyu0809 @sterling-teng @atishp04 @bonzini @xiaobo55x